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TAKANO, Keisuke Assistant Professor
Information Science, Next-Generation Digital Infrastructure, Center for Information Infrastructure

Published Papers

17 items
An Ultra-Low-Power ELM-RLS Chip for On-Chip Online Learning in Extreme-Edge AI Systems
Yinfei Ma, Keisuke Takano, Shiyuan Sun, Satoshi Kawakami, Takeaki Yajima
In Proceedings of the International Conference on Solid State Devices and Materials (SSDM), -, 2026
Implementation of a SIMT processor on FPGA ~ Evaluation of implementation area and performance ~
Shun Murakami, Keisuke Takano, Yasushi Inoguchi
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 126, 140, 49-54, 2026
Pure-Integer MXINT CNN Training: Block Size, Operand-Wise Precision, and the Onset of Training Collapse
Satoshi Tanabe, Keisuke Takano, Yasushi Inoguchi
The PDPTA 2026 proceedings, part of CSCE 2026, deal with current trends in parallel and distributed processing techniques., -, 2026
A Study on Automatic Directive Insertion in HLS
Keisuke Takano, Yasushi Inoguchi
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 126, 51, 29-32, 2026
RDMA and PR mechanism for Middle Scale FPGA clusters
Keisuke Takano
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 125, 342, 7-11, 2026
Concept of Heterogeneous PC-FPGA hybrid system
Keisuke Takano
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 125, 144, 111-115, 2025
A study of load balancing for accelerating;sparse matrix vector;product while reducing memory footprint on GPU
Shun Murakami, Kazunori Yoneda, Takashi Iwamura, Masahiro Watanabe, Keisuke Takano, Yasushi Inoguchi
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 125, 142, 31-35, 2025
Design of The Ultra-Low-Power Driven VMM Configurations for μW Scale IoT Devices
Keisuke Takano, Takeaki Yajima, Satoshi Kawakami
2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), 65-72, 2023
Implementation and Evaluation of Distributed Processing on a PC-FPGA Hybrid System
Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata
IEEJ Transactions on Electronics, Information and Systems, 142, 11, 1199-1207, 2022
Approach of a Coding Conventions for Warning and Suggestion in Transpiler for Rust Convert to RTL.
Keisuke Takano, Tetsuya Oda, Masaki Kohata
9th IEEE Global Conference on Consumer Electronics(GCCE), 789-790, 2020
Implementation of Process Migration Method for PC-FPGA Hybrid System.
Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata
Advances on Broad-Band Wireless Computing, Communication and Applications - Proceedings of the 15th International Conference on Broad-Band and Wireless Computing, Communication and Applications (BWCCA-2020)(BWCCA), 204-210, 2020
PC process migration using FPGAs in ring networks
Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata
IEICE Communications Express, 9, 5, 141-145, 2020
Design of a DSL for Converting Rust Programming Language into RTL.
Keisuke Takano, Tetsuya Oda, Masaki Kohata
Advances in Internet, Data and Web Technologies, The 8th International Conference on Emerging Internet, Data and Web Technologies(EIDWT), 342-350, 2020
Implementation of Distributed Processing Using a PC-FPGA Hybrid System.
Keisuke Takano, Tetsuya Oda, Ryo Ozaki, Akira Uejima, Masaki Kohata
International Conference on Field-Programmable Technology(FPT), 387-390, 2019
RustからVerilogへのトランスパイラの実装
高野恵輔, 小田哲也, 小畑正貴
情報処理学会研究報告(Web), 2018, DPS-176, -, 2018
PC-FPGA複合クラスタ上での動的部分再構成による画像処理 (リコンフィギャラブルシステム)
高野 恵輔, 上嶋 明, 尾崎 亮, 小畑 正貴
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 117, 46, 57-62, 2017
Concept of PC-FPGA Hybrid Cluster system by General-purpose FPGA board
高野 恵輔, 上嶋 明, 尾崎 亮, 小畑 正貴
電子情報通信学会技術研究報告 = IEICE technical report : 信学技報, 116, 210, 39-44, 2016