TANAKA, Kiyofumi Professor
School of Information Science, Security and Networks Area, School of Information Science
B.S., M.S. and Ph.D. from the University of Tokyo (1995, 1997, 2000) The University of Tokyo
◆Professional Experience
2001 - : Japan Advanced Institute of Science and Technology , School of Information Science , Associate Professor
2001 - 2005 : Japan Science and Technology Agency, PRESTO Researcher
2000 - 2001 : Research Associate(JSPS) at the University of Tokyo
Computer systems
◆Research Keywords
プロセッサアーキテクチャ, 並列計算機, リアルタイムシステム, 組込みシステム, 高機能アーキテクチャ
◆Research Interests
Parallel computer architecture
In parallel computer systems, dynamic reduction in messages is an effective scheme for preventing hot-spots which degrade performance. We study how to build a highly functional interconnection network that implements the reduction. Futher, we study adaptive directory scheme for management of shared data.
Memory system for large-scale data
We propose a reconfigurable cache memory that provides a buffer for large-scale data, and DMA mechanisms by a memory controller where stride data sequences are gathered and transferred efficiently. We evaluate the efficiency of them applied to real applications.
Embedded system architecture
We develop the RISC core for embedded systems which is configurable about the hardware elements according to demands on speed, size of hardware and consumption of electricity by various applications. Further, we develop real-time operating system which performs adaptive scheduling. In addition, we investigate reduction in electricity consumption for future architecture.
Processor Architecture for Real-Time Multitasking
A computer is used in multitasking fashion based on time sharing. In this rsearch, we propose the architecture that reduces the time required for switching processor contexts such as register contents and address space when an active task is switched, and alleviates constraints in scheduling of real-time applications.


◆Published Papers
Building Fine-Grained Configurable ITRON Based RTOS
Tetsuo Miyauchi, Kiyofumi Tanaka
Journal of Information Processing, 28, 395-405, 2020
Dependency-Driven Trace-Based Network-on-Chip Emulation on FPGAs
Thiem Van Chu, Kenji Kise, Kiyofumi Tanaka
Proceedings of The 2020 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 211-221, 2020
Overview of An Adaptive Approach for Implementing RTOS in Hardware
Tetsuo Miyauchi, Kiyofumi Tanaka
Proceedings of Asia Pacific Conference on Robot IoT System Development and Platform (APRIS), 13-20, 2019
A Proposal of Application Specific Approach with RISC-V Processor on FPGA
Tetsuo Miyauchi, Kiyofumi Tanaka
Proceedings of the 22nd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI), 270-273, 2019
Adaptive Local Assignment Algorithm for Scheduling Soft-Aperiodic Tasks on Multiprocessors
Duy Doan, Kiyofumi Tanaka
Proceedings of IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA), IEEE Xplore, 6 pages-, 2019
Hardware Implementation of Elliptic Curve Scalar Multiplication Algorithms with Side-Channel Protection
Kiyofumi Tanaka, Atsuko Miyaji
IPSJ SIG Technical Reports, EMB, 2020-EMB-54, 2, 1-8, 2020
FPGA SoCにおける多倍長演算の実装
情報処理学会研究報告, EMB, 2019-EMB-53, 42, 1-5, 2020
A Study of Real-Time Extension for RISC-V Processors
Aye Myat Mon, Thiem Van Chu, Kiyofumi Tanaka
IPSJ SIG Technical Reports, EMB, 2019-EMB-51, 7, 1-2, 2019
Reducing Jitter and Energy in Hard Real-time Systems Using Intra-task DVFS Technique
Bo-Yu Tseng, Kiyofumi Tanaka
情報処理学会第80回全国大会講演論文集, DVD-ROM, -, 2018
Adaptive Computing Framework in the IoT Era
Kiyofumi Tanaka
International Conference for Tips for Top and Emerging Computer Scientists (IC-TECS), -, 2017

■Teaching Experience

Processor Design Laboratory, Enhanced Operating Systems, Operating Systems, Integrated Architecture, Digital Logic and Computer Design, Computer Architecture, Parallel and Distributed Systems Architecture

■Contributions to  Society

◆Academic Society Affiliations
◆Academic Contribution
Management Committee Member of Hokuriku Section , The Institute of Electronics, Information and Communication Engineers (IEICE)
Chief Examiner of Special Interest Group on Embedded Systems (SIGEMB) , Information Processing Society of Japan
Journal Reviewer , Information Processing Society of Japan

■Academic  Awards

・ Best Paper Award , "IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-2018)" , 2018
・ Best Paper Award , "International Conference on Information and Communication Technology for Embedded Systems" , 2017
・ シンポジウム2016奨励賞 , 情報処理学会組込みシステム研究会 , 2016